1. Field of the Invention
The present invention relates to integrated circuit devices, particularly integrated circuit memory devices, having output terminals, and to circuitry for precharging the output terminals to reduce the time needed to drive output signals on such output terminals.
2. Description of Related Art
Integrated circuits have output terminals, typically referred to as output pads, on which signals are driven for access by external circuitry. The output pads typically have significant capacitance. For this reason output driver circuitry is included that uses large transistors to drive the output pads, or that consumes a significant amount of time in driving in the output pads to the desired signal level. As integrated circuits become more complex, and operate at higher speeds, the area and speed trade-off involved in the output drivers becomes more critical.
For integrated circuit memory devices, the read access time is becoming a critical parameter. The read access time is measured from the beginning of a read cycle until the time that data is available on the output pads for use by the external circuitry.
The access time can be considered to have two components. The first component consists of the amount of time between the time a read signal is received by the device, and the time internal data is available to the output driver. The second component consists of the amount time that takes the output driver to change the level of the output pad to a level acceptable for use by external circuits. The first component is largely controlled by the architecture of the memory device. The second component involves the performance of the output driver, and the charge on the pad when the output driver is enabled. Thus, if the output voltage is to be driven to a high level, and the pad is charged near ground at the beginning of the cycle, then the time required to reach a suitable voltage level is longer. Likewise, if the output voltage is to be driven to a low level, and the pad is charged near a high level at the beginning of the cycle, then the time required is longer.
It is desirable to ensure that the output pad is precharged to a level near the middle of the voltage range. In this way, the output driver has a shorter distance to move the voltage on the pad in the worst-case, and can accomplish its task in a shorter, more predictable time interval. In this application, unless apparent from the context, the word "precharge" is intended to the both charging up from a low voltage to a higher voltage, and charging down from a high voltage to a lower voltage. In this way, we avoid repeatedly using such phrases as "precharge and/or predischarge."
Background concerning technology that has been developed to address the problem of output driver precharge can be found in U.S. Pat. No. 5,151,621 entitled HIGH-SPEED OUTPUT BUFFER UNIT THAT PRELIMINARILY SETS THE OUTPUT VOLTAGE LEVEL; U.S. Pat. No. 5,058,066 entitled OUTPUT BUFFER PRECHARGE CIRCUIT FOR DRAM; U.S. Pat. No. 4,988,888 entitled CMOS OUTPUT CIRCUIT WITH INTERMEDIATE POTENTIAL SETTING MEANS; U.S. Pat. No. 5,204,838 entitled HIGH SPEED READOUT CIRCUIT; U.S. Pat. No. 5,377,149 entitled OUTPUT PRECHARGE CIRCUIT FOR MEMORY.
Taking the '621 patent for example, the precharge circuitry suffers the disadvantage that it relies on the same driver for precharging as used for driving the actual data. This has the disadvantage that as speeds increase, undesirable noise can be injected into the read path. The '621 patent inserts transmission gates between the internal circuitry and output buffer to prevent this problem with noise. However, the transmission gates consume significant area in the output driver, offsetting some of the benefits of the precharge circuitry. The '621 patent also suffers the disadvantage that it relies on sensing the previous output data value, and storing such value in a latch (e.g. 31d). It is possible that the voltage on the output terminal could drift between the read cycles, causing the precharge circuit to be initialized incorrectly.
Accordingly, it is desirable to provide a more efficient pull up and pull down circuit for use in precharging output terminals of integrated circuits, which operates quickly and with predictable timing consumes less standby current, and uses minimum space on integrated circuit.